Digital Electronics Lab Manual For Diploma
Verification and interpretation of truth tables for AND, OR, NOT, NAND, NOR Exclusive OR (EX-OR), Exclusive NOR (EX-NOR) Gates. Apparatus: Logic trainer kit, logic gates / ICs, wires. Theory: Logic gates are electronic circuits which perform logical functions on one or more inputs to produce one output.
There are seven logic gates. When all the input combinations of a logic gate are written in a series and their corrresponding outputs written along them, then this input/ output combination is called Truth Table. Various gates and their working is explained here. AND Gate AND gate produces an output as 1, when all its inputs are 1; otherwise the output is 0. This gate can have minimum 2 inputs but output is always one.
Its output is 0 when any input is 0. Realization of logic functions with the help of universal gates-NAND Gate. Apparatus: logic trainer kit, NAND gates (IC 7400), wires. Theory: NAND gate is actually a combination of two logic gates: AND gate followed by NOT gate. So its output is complement of the output of an AND gate. This gate can have minimum two inputs, output is always one.
Digital Electronics Lab Manual For Diploma Eee
By using only NAND gates, we can realize all logic functions: AND, OR, NOT, X-OR, X-NOR, NOR. So this gate is also called universal gate. NAND gates as NOT gate A NOT produces complement of the input. It can have only one input, tie the inputs of a NAND gate together.
Now it will work as a NOT gate. Its output is Y = (A.A)’ = Y = (A)’.
Inputs Output 1 A, B (AB)’ 2 A, (AB)’ (A (AB)’)’ 3 (AB)’, B (B (AB)’)’ 4 (A (AB)’)’, (B (AB)’)’ A’B + AB’ Now the ouput from gate no. 4 is the overall output of the configuration. Y = ((A (AB)’)’ (B (AB)’)’)’ = (A(AB)’)’’ + (B(AB)’)’’ = (A(AB)’) + (B(AB)’) = (A(A’ + B)’) + (B(A’ + B’)) = (AA’ + AB’) + (BA’ + BB’) = ( 0 + AB’ + BA’ + 0 ) = AB’ + BA’ = Y = AB’ + A’B - NAND gates as X-NOR gate X-NOR gate is actually X-OR gate followed by NOT gate. So give the output of X-OR gate to a NOT gate, overall ouput is that of an X-NOR gate. Y = AB+ A’B’.
Procedure:. Connect the trainer kit to ac power supply. Connect the NAND gates for any of the logic functions to be realised. Connect the inputs of first stage to logic sources and output of the last gate to logic indicator.
Apply varous input combinations and observe output for each one. Verify the tructh table for each input/ output combination. Repeat the process for all logic functions. Switch off the ac power supply. Procedure:.
Connect the trainer kit to ac power supply. Connect the NOR gates for any of the logic functions to be realised.
Connect the inputs of first stage to logic sources and output of the last gate to logic indicator. Apply varous input combinations and observe output for each one. Verify the tructh table for each input/ output combination. Repeat the process for all logic functions. Switch off the ac power supply. Construction of half adder using XOR and NAND gates and verification of its operation.
Apparatus: Logic trainer kit, Logic gates: AND (IC 7408), XOR (IC 7486), NAND(7400). Theory: A half adder can add two bits at a time. Its outputs are SUM and CARRY. For two bit addition- SUM will be 1, if only one input is 1(X-OR operation). CARRY will be one, when both inputs are 1 (AND operation). So, by using one AND gate and one X-OR gate, a half adder circuit can be constructed. Boolean expressions for the outputs are: SUM = AB’ + A’B CARRY = AB.
Operation of S-R latch. S=0, R=0: this is the rest state of the NOR latch. This input has no effect on the output state. Outputs (Q, Q’) will remain in whatever state they were prior to the occurance of this input combination. S=1, R=0: this will always set the latch (Q=1, Q’=0), it will remain in this state even after S returns to 0.
S=0, R=1: this will always reset the latch (Q=0, Q’=1), it will remain in this state even after r returns to 0. S=1, R=1: this condition tries to set and reset the latch at the same time and produces Q=0, Q’=0. If inputs are returned to 0 at same time, the resulting output state is unpredictable. This input condition should not be used.
Procedure:. Connect the trainer kit to ac power supply. Construct an R-S latch by connecting two NOR gates as per logic diagram. Connect logic sources to R, S inputs and outputs Q, Q’ to logic indicators. Apply various R-S combinations and observe Q,Q’ outputs.
Digital Electronics Lab Manual Royal College
Verify the truth table. New holland 190 service manual. Switch off the ac power supply.